Re: Only reading of variable vs. thread synchronisation
On Jun 7, 11:19 pm, Ian Collins <ian-n...@hotmail.com> wrote:
Helge Kruse wrote:
"James Kanze" <james.ka...@gmail.com> wrote:
You disagree with Posix?
No, never wrote this, I never cited Posix. I disagree that
the single memory access is irrelevant. The fact if you have
single memory access it determines the robustness of the
read operation. With a single memory access it is just
impossible that the problem I described.
Aside from the standards issues already raised, consider a
single *misaligned* memory access requiring more than one bus
cycle. A context switch may occur during such a read.
Note that the problem can be extremely complex. Some hardware
doesn't support byte reads and writes (at the memory access
level): writing a char involves reading the word, replacing the
byte in question, then rewriting it. There was some discussion
during standardization about what to do about those---in the
end, the decision was that the implementation has to make them
work, one way or another. Which may mean some form of locking
and external synchronization on some machines. (On the other
hand, individual bit fields in a common structure are *NOT*
James Kanze (GABI Software) email:email@example.com
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