Re: Am I or Alexandrescu wrong about singletons?
On Mar 25, 7:10 pm, George Neuner <gneun...@comcast.net> wrote:
On Thu, 25 Mar 2010 00:20:43 CST, Andy Venikov
As you noted, 'volatile' does not guarantee that an OoO CPU will
execute the stores in program order ...
Arguably, the original intent was that it should. But it
doesn't, and of course, the ordering guarantee only applies to
variables actually declared volatile.
for that you need to add a write fence between them. However,
neither 'volatile' nor write fence guarantees that any written
value will be flushed all the way to memory - depending on
other factors - cache snooping by another CPU/core, cache
write back policies and/or delays, the span to the next use of
the variable, etc. - the value may only reach to some level of
cache before the variable is referenced again. The value may
never reach memory at all.
If that's the case, then the fence instruction is seriously
broken. The whole purpose of a fence instruction is to
guarantee that another CPU (with another thread) can see the
changes. (Of course, the other thread also needs a fence.)
OoO execution and cache behavior are the reasons 'volatile'
doesn't work as intended for many systems even in
single-threaded use with memory-mapped peripherals.
The reason volatile doesn't work with memory-mapped peripherals
is because the compilers don't issue the necessary fence or
membar instruction, even if a variable is volatile.
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