Re: Named shared memory without synchronization
"Dan Schwartz" <DanSchwartz@discussions.microsoft.com> wrote in message
news:FB7CC2CF-80C0-4900-A2B7-6E7F3F86BAD5@microsoft.com
"Igor Tandetnik" wrote:
DEC instruction performs a read followed by a write. Each half by
itself is atomic, but the combination is not. Memory could be
modified by another processor between a read and a write, and this
new value will be lost.
This implies that DEC is a pseudo-instruction. I was not aware of
this(?).
I don't understand what you mean by "pseudo-instruction". Intel's CPU
instructions manual does not seem to mention this term. It has the
following to say, though, about LOCK prefix:
"Causes the processor's LOCK# signal to be asserted during execution of
the accompanying instruction (turns the instruction into an atomic
instruction). In a multiprocessor environment, the LOCK# signal insures
that the processor has exclusive use of any shared memory while the
signal is asserted.
The LOCK prefix can be prepended only to the following instructions and
only to those forms of the instructions where the destination operand is
a memory operand: ADD, ADC, AND, BTC, BTR, BTS, CMPXCHG, CMPXCH8B, DEC,
INC, NEG, NOT, OR, SBB, SUB, XOR, XADD, and XCHG."
So this is the list of non-atomic instructions that have to be made
atomic by the LOCK prefix.
You can find the manuals here:
http://www.intel.com/products/processor/manuals/index.htm
--
With best wishes,
Igor Tandetnik
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necessarily a good idea. It is hard to be sure where they are going to
land, and it could be dangerous sitting under them as they fly
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