Re: Why bool take 1 byte?
On Nov 2, 4:34 am, Jack Klein <jackkl...@spamcop.net> wrote:
On Thu, 01 Nov 2007 05:09:05 GMT, red floyd <no.s...@here.dude> wrote
in comp.lang.c++:
No, the Z80 was byte addressable, though it had bit manipulation
instructions.
The fact that a Z80 actually had to read or read/modify/write an
entire 8-byte byte to test, set, or clear a single bit was completely
immaterial from an architectural point of view, that's a hardware
implementation detail.
Would you claim that a Pentium was not "really" byte addressable,
because it will read a minimum of 64 bits from memory to change the
value of just one of them?
But it won't write the others, even if it reads them.
Given:
char ca [8] = { 0 };
++ca[4];
...the processor hardware will execute at least two 64-bit bus
cycles, reading the entire contents of the array if it is
suitably aligned to get at ca[4]. If it winds up in the
cache, it will eventually write all 64 bits back to memory,
even though only one 8-bit octet is changed.
Are you sure of this? If so, it makes multithreaded code pretty
much impossible, at least with the usual definitions. Thread 1
(on processor 1, with cache 1) reads the array, and modifies
ca[4]. Thread 2 (on processor 2, with cache 2) reads the array,
and modifies ca[3]. The last one to write overwrites the
other's modification. According to Posix (and the upcoming C++
standard), no external synchronization is necessary, because
different C++ objects are being modified. (Note that while
Posix isn't too clear about this, the upcoming C++ standard will
clearly state that different bit fields in the same struct are
not different objects.)
set 0,(hl)
...on a Z80 was a single, and atomic, instruction, regardless
of what the hardware did to make it happen.
IIRC, the Z80 didn't have any hardware support for atomic
operations between processors. So it was only atomic within a
processor.
--
James Kanze (GABI Software) email:james.kanze@gmail.com
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