Re: Only reading of variable vs. thread synchronisation
On Jun 6, 1:19 pm, "Helge Kruse" <Helge.Kruse-nos...@gmx.net> wrote:
"James Kanze" <james.ka...@gmail.com> wrote in message
news:464682ca-4575-4bf2-90b8-a792c2312b5e@k13g2000hse.googlegroups.com...
[...]
If any thread modifies the variable, both Posix and Windows
require synchronization. Even if the variable is in a single
machine word (something you really can't know). Whether the
variable is in a single machine word or not is totally
irrelevant here.
I disagree.
You disagree with Posix?
No, never wrote this, I never cited Posix.
But I did. The Posix standard says that whether the memory
accessed is a single word or not is irrelevant. If you
disagree, then you disagree with the Posix standard.
I disagree that the single memory access is irrelevant. The
fact if you have single memory access it determines the
robustness of the read operation.
Conforming to the specifications of your platform and your OS
determines the robustness of the read operation. Some platforms
may give you special guarantees for single word accesses;
Sparcs under Solaris don't, however, and as far as I know, nor
do Intels under Windows. If you know otherwise, you're free to
point me to the documentation which specifies it---I've been
looking for something more detailed and precise for Windows for
a long time now.
With a single memory access it is just impossible that the
problem I described.
What problem? Whether the data is in a single word or not, you
don't have any guarantee from Posix that it will work.
The compiler defines how data is stored. The statement, if
a variable is in a single word is compiler and CPU
dependend. But you can know.
For a given compiler, on a given machine, you can sometimes
know.
You're right. But that's not "something you really can't
know". Well, you said you can know.
You can know whether the data is on a single word, or not,
sometimes, although such guarantees are rare. You can't know
whether that will help.
But it's irrelevant. Even if the variable is in a single
machine word, you need external synchronization.
If a read operation is in a single memory read operation, what
do you want to synchronize?
Memory.
I'll occasionally drop down to assembler, and insert a
membar function myself...
Sorry, dont know this membar function.
It's the Sparc equivalent of a fence. It's used to synchronize
memory.
(On IA-32 architecture, I think that the lock
prefix---implied on the xchg instruction, will automatically
set up some sort of fence.
Yes, the lock prefix can avoid interrupt (and thread switch)
for an instruction.
At least on recent Intel processors, it does a lot more; it
generates some sort of implicit fence, ensuring memory
synchronization.
No, the xchg instruction is only used for read and modify.
And it has an implicit lock prefix, at least on more recent
Intel processors. (This means that a single xchg instruction
will probably be slower than a series of mov instructions if you
don't need the synchronization.)
--
James Kanze (GABI Software) email:james.kanze@gmail.com
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