Re: How to make this program more efficient?
On Sep 24, 1:00 am, Jon Harrop <j...@ffconsultancy.com> wrote:
peter koch wrote:
On 23 Sep., 21:27, Jon Harrop <j...@ffconsultancy.com> wrote:
courp...@gmail.com wrote:
You still make a confusion between locks and memory
barriers.
Sorry: I read "synchronization" and assumed Peter was
referring to locks.
The two are quite different: although Posix (and doubtlessly
Windows as well) guarantees synchronization accross a lock, lock
free algorithms exist, but they still also require
synchronization.
Well - I can speak for myself and did not mean locks -
simply synchronisation.
Are memory barriers a form of synchronization?
On many machines (e.g. Sparc), they're the only form of memory
synchronization. (I think that Intel refers to them as fences.
I think that Intel also offers some additional guarantees, and
that in particular---if I've understood correctly---it
implicitly generates full memory synchronization around an xchg
instruction. I'm more familiar with Sparc: for Sparc, you
should read section 3.2 of the "Sparc Architecture Manual",
http://www.sparc.org/standards/SPARCV9.pdf)
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