Re: Am I or Alexandrescu wrong about singletons?
On Mar 30, 12:04 pm, Andy Venikov <swojchelo...@gmail.com> wrote:
Of course, for another thread to be guaraneed to see the results
of any store, it has to use a load fence, to ensure that the
values it sees are those after the load fence, and not some
value that it happened to pick up earlier.
What I meant was that memory fence doesn't mean that the
effects of a write will be immediately flushed to the main
memory or effects of a read immediately read from the main
Not meaning to be impolite or anything, but what you meant or
mean isn't really that relevant. The Intel specification says
that mfence guarantees global visibility. And if you're
programming on an Intel, that's the only definition that is
Generally, memory fence is merely a checkpoint to tell the
processor not to reorder instructions around the fence.
Again, a fence will prevent reordering, but only as a
consequence its fundamental requirements.
(I keep seeing mention here of instruction reordering. In the
end, instruction reordering is irrelevant. It's only one thing
that may lead to reads and writes being reordered. And what
mfence guarantees is strong memory---not just
instruction---ordering around it.)
I don't remember what processor docs I've read (I believe it
was Itanium) but here's for example what the docs said about a
store fence: a store barrier would make sure that all the
stores appearing before a fence would be stored in the
write-queue before any of the stores that follow the fence.
That would be a very strange definition, since it would mean
that a store barrier would be useless, and that there would
never be a reason for using one. The Intel IA86 documentation
says very clearly that all preceding writes will be globally
visible; the Sparc architecture specifications say basically the
same thing for a membar.
In no way you're guaranteed that any of the stores are in main
memory after the fence instruction was executed.
That's not the case for IA-32, nor for Sparc.
For that you'd have to use a flush instruction.
I suppose a machine could require two instructions to achieve a
true fence, but it seems like a very awkward way of doing
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